1. Field of the Invention
This invention relates to a timing synchronizing circuit for providing common system timing in a multi-station communication network which transmits and receives digital signals over a communication cable.
2. Background
Recently, communication devices and communication networks based on a data exchange system such as a packet exchange system have been greatly developed. In a coded transmission system in which digital signals are coded for transmission, the signal transmitting side and the signal receiving side should be timed for transmitting and receiving signals.
FIG. 1 shows the simplest transmission system. In the system, a transmitter 12 is connected to one end of a transmission path 11, to the other end of which a receiver 13 is connected. In this "point-to-point" transmission system also, it is desirable that synchronization such as bit synchronization or word synchronization is performed according to bit rate, in order to compensate for signal propagation delay times. In such a system, system timing can be established relatively readily.
FIG. 2 shows a multi-point transmission system. In the system, a plurality of terminal stations 15-1 through 15-N (N being an integer larger than one (1)) are connected to a common communication cable 14. If these stations generate clock frequencies which are substantially equal to one another, data communication can be performed among the stations without bit synchronization. One example of the above-described communication system is a "modified ethernet" system which is provided by modifying an "ethernet" system. In the modified ethernet system, a large segment (frame) which occurs periodically on the time axis is divided into a plurality of small segments (blocks), so that the stations can engage in packet communication in block units. In the system, the stations can equally utilize empty blocks. Furthermore, if a station is assigned a block, then it can use the same block in every frame. That is, the system is advantageous in that real time transmission is carried out.
FIG. 3 shows the frame format for signals in the modified ethernet. In FIG. 3 and other timing diagrams, time increases toward the left. A frame occurs periodically on the time axis, and consists of N blocks #1 through #N. Each block consists of the following bit trains b.sub.1 through b.sub.9 where;
b.sub.1 : rear guard time
b.sub.2 : preamble
b.sub.3 : start flag
b.sub.4 : address bits
b.sub.5 : control bits
b.sub.6 : data bits
b.sub.7 : check bits
b.sub.8 : end flag
b.sub.9 : front guard time
Note that the numbering of blocks and bit trains decreases with increasing time.
The bit trains b.sub.2 through b.sub.5, b.sub.7 and b.sub.8 are necessary for forming a packet, and are generally called "overhead bits" because they are additional bits to the desired data bits. The two bit trains b.sub.1 and b.sub.9 serve as "guard time". That is, the guard time is an empty bit train which is provided to prevent the difficulty that adjacent packets might overlap partially with each other because of delay time in propagation of packets over the coaxial cable 14. The rear guard time b.sub.1 is to protect a packet occurring after it. The front guard time b.sub.9 is to protect a packet occurring before it. The sum of the number of bits of the rear guard time b.sub.1 and the number of bits of the front guard time b.sub.9 will be represented by g bits, and a guard time (b.sub.1 and b.sub.9) by .tau.(g).
In the above-described communication system, when none of the stations transmit signals, each station can equally start transmitting a signal, which is framed as described above, at a completely independent time. A station which has first transmitted a signal onto the communication cable has the leadership of frame synchronization.
When frame synchronization has been established as described above, all the stations can monitor the states of signals transmitted over the communication cable. In each station, a subscriber device has a memory for indicating the assignment of the block in a frame, and each block is registered according to the received packet signals of the stations.
After frame synchronization has been established, in order for another station to transmit a packet signal, an empty block is selected according to the aforementioned memory, so that the station is assigned the empty block to transmit the packet signal.
In this operation, the timing at which the stations start transmitting the packet signals is essential. Referring to FIG. 4, it is assumed that a station C is located at the middle of a coaxial cable 18 which is laid between impedance matching terminators 16 and 17, and a station S which has transmitted a signal is located between one terminator 16 and the station C. In this case, the packet signal transmitted by the station S is received by other stations R.sub.1 through R.sub.4 at different times according to delay times of signal propagation over the intervening coaxial cable. Accordingly, if the stations transmit the packet signals carelessly, then the packet signals may collide with one another as they travel over the coaxial cable 18.
In order to prevent this difficulty, in the communication system the stations perform synchronously for block and/or frame, because even if clock signals are separately transmitted for bit synchronization or word snchronization, it is difficult for each station to adjust the variable signal propagation delay time between pairs of stations.
By way of example, the communication system called a "modified ethernet" system has been described. When multi-station transmission is carried out according to a communication system based on the technical concept of both frame and block, similarly it is necessary to establish frame synchronization or block synchronization. However, a circuit which can achieve the timing synchronization effectively and accurately has not been produced nor disclosed yet.